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Assembly (x86-64, AArch64, RISC-V) Module 18

8-bit assembly: the 8051 microcontroller and the 8085 interview questions

Interview questions on “8-bit assembly: the 8051 microcontroller and the 8085”: warm-ups, then what each harder question tests and how a good answer starts.

23 questions: 4 warm-ups and 19 with model answers · Levels: Fresher to staff

Warm-up questions

Short questions with short answers, each answered in full.

  1. Fresher to mid

    How does an 8051 program choose which bytes R0 to R7 are, and how does it switch to another bank?

    Answered in the lesson The 8051: memory map, registers and SFRs

  2. Fresher to mid

    What makes the 8085 an accumulator machine, and how does that shape a calculation?

    Answered in the lesson The 8085 for assembly programmers: a bridge

  3. Fresher to mid

    What does each field of an Intel HEX record hold, and how is its checksum checked?

    Answered in the lesson 8-bit toolchains: assemblers, HEX and simulators

  4. Fresher to mid

    Why does a simulator such as uCsim start a program with random register and RAM values, and what should a lab program do about it?

    Answered in the lesson 8-bit toolchains: assemblers, HEX and simulators

Questions with model answers

What each question tests, the first step of a good answer and the follow-ups to expect.

  1. Fresher to mid

    A Timer 0 interrupt handler on an 8051 at 11.0592 MHz uses A, the flags and R0 to R3, while the main program works in register bank 0. Should the handler push the registers it changes, or give itself a register bank of its own? Compare the two in machine cycles and in RAM.

    What it tests
    Knowing what the hardware call into a handler saves and what it leaves, the cost of PUSH, POP and a PSW write in machine cycles, and what a second register bank takes away from the rest of RAM.
    First step
    Write out the entry and exit code of both versions, the pushes and pops in one and the PSW change in the other, and look up the machine cycles of each instruction in Intel's instruction set table. Then list the RAM each version needs while the handler runs and when it does not.
    Follow-ups

    From the lesson The 8051: memory map, registers and SFRs

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    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  2. Fresher to senior

    A designer wants to replace the 11.0592 MHz crystal of an 8051 lab board with a 12 MHz one, so that a machine cycle lasts a round 1 µs. The board talks to a PC terminal at 9600 baud, with Timer 1 as the baud-rate generator. What would break, by how much, and what do you recommend?

    What it tests
    Deriving a baud rate from the crystal through Timer 1's 8-bit reload, working out the error each crystal gives, and weighing serial accuracy against round timing for the delays.
    First step
    Write Intel's Timer 1 baud-rate formula for serial mode 1, solve it for the reload at 9600 baud with each crystal, and see whether the result is a whole number. Where it is not, compute the baud rate of the nearest whole-number reload and its error in percent.
    Follow-ups

    From the lesson The 8051: memory map, registers and SFRs

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  3. Mid to senior

    An 8051 program keeps eight status flags in byte 20H and works in register banks 0 and 1. At start-up it loads SP with 0FH, just above those banks. Now and then a flag changes although no instruction writes it, always when the serial interrupt arrives during a deep chain of calls. Why, and what is the fix?

    What it tests
    Reading the internal RAM map, finding what can write a byte that no instruction names, catching that write in a simulator and bounding the RAM that calls, interrupts and pushes can use.
    First step
    Catch the write instead of guessing: run the failing case in uCsim with a write breakpoint on byte 20H, then read SP, the instruction that wrote and the bytes from 10H up when it stops.
    Follow-ups

    From the lesson The 8051: memory map, registers and SFRs

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  4. Fresher to mid

    An 8085AH board runs from a 6 MHz crystal, and a program must wait 10 ms between two readings of a switch. Write the delay as a subroutine with a 16-bit counter, give its pass count and its error, and say how you would check the timing before the code reaches the board.

    What it tests
    Turning a crystal into a T-state time, reading T-states from Intel's Table 5-1, building a 16-bit loop whose zero test reads the counter, and solving the loop's formula for a time.
    First step
    Start from the clock: find in Intel's data sheet how the 8085AH turns its crystal into a clock, then how many T-states 10 ms is. Write a 16-bit loop whose zero test really reads the counter, add up the T-states of one pass and of everything outside the loop, CALL and RET included, and solve the total for the pass count.
    Follow-ups

    From the lesson The 8085 for assembly programmers: a bridge

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 3 minutes

  5. Mid to senior

    A regression test runs one 8085 BCD routine in two simulators and compares the flag byte that PUSH PSW stores after MVI A,93H, ADI 08H and DAA. One simulator stores 11H, the other 01H, and A is 01H in both. Which byte is right, how do you decide, and what should the test compare?

    What it tests
    Decoding the 8085 flag byte, applying Intel's DAA rule with the auxiliary carry, settling a disagreement between two tools on evidence, and turning that into a test that keeps finding faults.
    First step
    Decode both bytes bit by bit with the PUSH PSW layout: S at bit 7, Z at 6, AC at 4, P at 2 and CY at 0. Then work DAA on 9BH by hand, one step at a time, and write down the AC and CY each step leaves before you look at either simulator's byte again.
    Follow-ups

    From the lesson The 8085 for assembly programmers: a bridge

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 5 minutes

  6. Fresher to senior

    An 8085 program unmasks RST 7.5 with SIM and runs EI once at start-up. Its routine at 003CH stores a reading and ends with RET. In a test the first rising edge runs the routine, but no later edge ever does. Why, what would RIM show afterwards, and how should the routine end?

    What it tests
    Knowing what accepting an interrupt does to the 8085's own interrupt state, how RST 7.5 holds an edge, what RIM reports and when EI takes effect, and confirming each with a run.
    First step
    List, in order, everything the 8085 does when it accepts RST 7.5, and beside each step what it changes inside the processor, not only on the stack. Follow the routine to RET and compare the processor's state then with its state before the first edge. Sim8085 can raise the edge, and RIM shows that state afterwards.
    Follow-ups

    From the lesson The 8085 for assembly programmers: a bridge

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  7. Fresher to senior

    A lab asks you to move a 19-byte 8085 program from 0000H to 8000H by editing only the load address of each Intel HEX record. The program jumps to its own label, loads the address of a byte inside itself and stores to 2052H. Does that edit move the program? Show the bytes.

    What it tests
    Reading the fields of a HEX record against a listing, telling an absolute address embedded in an instruction from one carried as a load address, and knowing which bytes AS re-emits when ORG changes.
    First step
    Build both versions of the program yourself: assemble it once with ORG 0000H and once with ORG 8000H, compare the two listings byte by byte against each HEX record, and mark which bytes of the data stay the same and which do not.
    Follow-ups

    From the lesson 8-bit toolchains: assemblers, HEX and simulators

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 5 minutes

  8. Fresher to senior

    A classmate's add8.asm stores the carry byte at 2053H only when there is one: JNC skips MVI A,01H and STA 2053H. For the lab's 9AH and 7FH, both assemblers give the same 22 bytes and both simulators store 19H and 01H in 79 T-states. Is the program right? Show what fails, and fix the check.

    What it tests
    Seeing that agreement covers only the inputs that ran, predicting what each simulator leaves in a byte that one path never writes, and choosing inputs, starting bytes and expected values that catch the fault.
    First step
    Trace the program by hand for two numbers whose sum has no carry, such as 10H and 20H: list the instructions that run and the bytes that nothing writes. Then ask what each simulator holds in such a byte before the run, and what the lab's check reads from it.
    Follow-ups

    From the lesson 8-bit toolchains: assemblers, HEX and simulators

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 5 minutes

  9. Fresher to mid

    A subroutine should return the square of A, 0 to 15, from a 16-byte table that follows its RET, read with MOVC A,@A+PC. Tested with 3, 7 and 0, it returns 4, 36 and 34. What is wrong, how would you show it in a simulator, and how do you fix it?

    What it tests
    Knowing which address MOVC A,@A+PC adds A to, reading a listing to place a table against that address, and weighing a table read through the PC against one read through DPTR, in cycles and in registers.
    First step
    Read the listing for three addresses: the MOVC, the RET and the first byte of the table. Work out by hand which address the read for A = 7 uses and which entry of the table sits there. Then confirm it in uCsim: stop on the RET for the inputs 3, 7 and 0 and read A each time.
    Follow-ups

    From the lesson 8051 assembly: addressing modes and lab programs

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  10. Fresher to mid

    An 8051 routine subtracts the 16-bit number in R5:R4 from the one in R3:R2 with SUBB, low bytes first. Most results are right, but now and then one is exactly 1 too small, always when an ADD ran just before the call. What goes wrong, and how do you fix it without breaking the 16-bit chain?

    What it tests
    Knowing what SUBB subtracts besides its operand, which instructions leave the carry set behind them, where a multi-byte subtraction must clear it and what the carry means after the last byte.
    First step
    Reproduce the fault before fixing it: in uCsim, run the routine twice on the same two numbers, once after CLR C and once after SETB C, and compare the two results. Then read the routine for the instruction that should decide the carry going into the low-byte SUBB.
    Follow-ups

    From the lesson 8051 assembly: addressing modes and lab programs

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 3 minutes

  11. Fresher to mid

    A board must send the byte in A, 0 to 255, to a terminal as three ASCII digits. A colleague suggests running DA A on it first to get the decimal value. Does that work? Write the conversion you would use and say what it costs in machine cycles and in microseconds at 11.0592 MHz.

    What it tests
    Knowing what DA A corrects and what it cannot, taking a byte apart into digits with the quotient and remainder of DIV AB, turning digits into ASCII codes and costing a routine from Intel's instruction table.
    First step
    Test the colleague's idea on paper first: apply the DA A rule to 0FFH and see whether 255 can come out. Then split 255 into its digits by division, note where the quotient and the remainder land after each step, and look up the machine cycles of every instruction in Intel's table.
    Follow-ups

    From the lesson 8051 assembly: addressing modes and lab programs

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 3 minutes

  12. Mid to senior

    An 8051 program has grown past 2 KB of code. After an unrelated change moves the code by a few bytes, one AJMP near 07FEH lands 2 KB away from its label, although the assembler reported no error. How can that happen, how would you find every jump and call at risk, and what rule would you set?

    What it tests
    Forming an AJMP or ACALL target the way the 8051 does, explaining how an assembler can pass a wrong one, scanning a listing for every instruction at risk and weighing a coding rule against its cost in bytes.
    First step
    Take the two bytes the listing shows for that AJMP and form the target by hand as Intel's manual describes it, then compare the result with the label's address. Run the program in uCsim with one breakpoint on the label and one on the address you formed, and see which of them stops it.
    Follow-ups

    From the lesson 8051 assembly: addressing modes and lab programs

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 5 minutes

  13. Fresher to mid

    An 8051 board with an 11.0592 MHz crystal must toggle an LED exactly once a second while it also exchanges commands with a PC at 9600 baud. Plan the timers: which one makes the tick and which the baud rate, in which modes, with which reload values, and how does the tick stay free of drift?

    What it tests
    Turning a delay and a baud rate into timer modes and reload values from the crystal, and knowing where a software-reloaded timer gains cycles that a hardware reload does not.
    First step
    Give the serial link its timer first, because serial mode 1 can only take its rate from Timer 1. Then work out how many machine cycles one second is at this crystal and split it into overflows that Timer 0 can count.
    Follow-ups

    From the lesson 8051 timers, serial port and interrupts

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  14. Fresher to senior

    A lab program on an 8051 at 11.0592 MHz receives commands at 9600 baud by polling RI and refreshes a multiplexed seven-segment display after every byte. Short commands work, but long ones arrive with characters missing. Explain what is going on and fix it, with numbers.

    What it tests
    Working out the time a receiver allows per byte, knowing what the 8051 does with a frame that completes while RI is still set, and moving slow work out of the receive path with an interrupt and a buffer.
    First step
    Count the machine cycles one 10-bit frame lasts at this baud rate and crystal, then count the cycles the display refresh takes between two reads of SBUF. Compare the two before you change any code.
    Follow-ups

    From the lesson 8051 timers, serial port and interrupts

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  15. Mid to senior

    Timer 0 in mode 2 interrupts a 12 MHz 8051, whose handler toggles P1.0 for a 10 kHz square wave. A colleague wants to shorten the reload by the cycles of the interrupt call and RETI. Is that right? What does the chip produce, and how would you check it in a simulator and on a board?

    What it tests
    Knowing that a timer counts independently of the code, that mode 2 reloads in hardware, the difference between interrupt latency and period, and how far a simulator's cycle accounting can be trusted.
    First step
    Separate the period from the edges: write down what sets the time between two overflows in mode 2, then what sets the time from an overflow to the instruction that flips the pin.
    Follow-ups

    From the lesson 8051 timers, serial port and interrupts

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  16. Fresher to mid

    An 8051 bubble sort of the 16 bytes at 30H-3FH is right on one board. On another, the same HEX file leaves a byte in the result that was never an input, and the largest input byte is missing. What is wrong, why does one board hide it, and how would you test for it on every board?

    What it tests
    Reading a loop count against the array it walks, knowing that RAM outside a program's data starts with any value, and designing a test whose result cannot depend on what that RAM holds.
    First step
    Write down which result byte was never an input and which input byte went missing. Then find where each one went: dump the bytes just below and just above the array before and after a run on both boards, and in a simulator set read breakpoints on the bytes on either side of the array.
    Follow-ups

    From the lesson 8051 lab programs and viva practice

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  17. Fresher to senior

    An 11.0592 MHz 8051 data logger stores one sample every 125 µs from a Timer 0 interrupt. The main program bubble-sorts each batch of 16 samples while the next batch fills. One test batch took well under 2 ms. Is the routine safe for every batch? What bound would you rely on, and how would you check it?

    What it tests
    Turning a routine's loops into a cycle count for its worst input, telling one measured case from a bound, and adding the time an interrupt takes from the main program.
    First step
    Do not trust one batch. Count the machine cycles of each line of the sort from Intel's instruction table, group them by how often each line runs and find the input that makes every count largest. Then add the cycles the sample interrupt takes: its hardware call, its handler and how many times it can run during one sort.
    Follow-ups

    From the lesson 8051 lab programs and viva practice

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  18. Mid to senior

    You have one bubble sort written for the 8051, the 8085, the 8086 and 32-bit RISC-V, with each version's size and instruction counts; only the 8051 and 8085 versions were run. A colleague says the version with the fewest instructions per pair must be the fastest. What can the numbers tell you, and what would you measure next?

    What it tests
    Telling code size, static and executed instruction counts and run time apart, knowing what sets the time of an instruction on each machine, and planning a fair timing comparison.
    First step
    Put the numbers in one table, one column for each thing they measure: bytes, instructions in the listing, instructions for one pair, instructions executed and time. Then ask for each column what turns it into time on that processor: cycles per instruction from the manufacturer's table, the clock rate, and for a pipelined core the processor itself.
    Follow-ups

    From the lesson 8051 lab programs and viva practice

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 4 minutes

  19. Mid to staff

    An 8051 lab program bubble-sorts 16 bytes correctly. After a Timer 0 interrupt that counts ticks is added, most runs still end sorted, but now and then one pair is out of order, and once a byte that was never an input appeared. Explain the failure, how you would make it happen on every run, and the fix.

    What it tests
    Knowing what the hardware call saves, finding the places where a handler can change a value between the instruction that sets it and the one that reads it, and turning a rare failure into a repeatable one.
    First step
    List what the handler changes: A, the flags its addition sets and the tick byte. Then mark each place in the sort where one of those is written by one instruction and read by a later one, and think about how a simulator could make the interrupt arrive at exactly one such place instead of at random.
    Follow-ups

    From the lesson 8051 lab programs and viva practice

    In the answer:

    • Model answer
    • Common mistakes
    • Rubric
    • Variants
    • about 6 minutes

All Assembly (x86-64, AArch64, RISC-V) interview questions · The Assembly (x86-64, AArch64, RISC-V) track