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PCB Trace Impedance Calculator

Field-solved Z0, Zdiff, εeff and delay for real stack-ups, and the width for your target.

Free preview, no sign-upIncluded in your pass Pro tool Pro pass: ₹179 for 30 days No upload Works offline Engineering

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  • Free preview: the first rows of the width table (up to 3), with the impedance, width or gap you solve for, the working and every other figure hidden.
  • Locked until you unlock it: download and copy.
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Stack-up

Structure
Signal
Solve for
Cross-section, not to scale.
mm
mm
From the reference plane to the bottom of the trace.
Finished thickness. Plated outer layers are often thicker than the foil.
FR-4 is typically 3.8 to 4.6, lower at higher frequencies: use your laminate’s value.

Result

Characteristic impedance —

How it was worked out

    Next steps Done. What next?

    All engineering & electronics calculators

    About the PCB Trace Impedance Calculator

    Work out the impedance of a PCB trace from its stack-up, or the width that gives the impedance you need: surface microstrip, embedded microstrip (a trace inside the dielectric with one plane), stripline centred or offset between two planes, and edge-coupled differential pairs of each. Type the trace width, the copper thickness, the dielectric heights and εr, and the calculator gives the characteristic impedance, or the differential, odd-mode, even-mode and common-mode impedances of a pair, with the effective permittivity, the propagation delay and the capacitance and inductance per length. Solve for the width that gives 50 Ω, or 90 Ω or 100 Ω across a pair, or the gap for a fixed width.

    Every result is field-solved: a 2D field solver runs in your browser and solves the cross-section you typed, with the copper’s thickness, the gap and the planes as drawn, so offset striplines, thick copper in narrow gaps and embedded traces come out right where closed-form formulas drift by several per cent. The published closed-form models (Hammerstad and Jensen, Wheeler, Kirschning and Jansen, Cohn) appear beside it, with the simple IPC-2141 formula, and a field-solved table gives the impedance at other widths for planning a stack-up.

    Without a pass, the free preview runs on your own stack-up: it shows the checks that apply and the first rows of the width table, with the impedance, width or gap you solve for, every other figure and the working hidden; the full result, Copy result and the CSV come with a Pro pass.

    How to use it

    1. Choose the structure (microstrip, embedded microstrip or stripline), single-ended or differential pair, and what to solve for.
    2. Pick mm or mil and type the trace width (and the gap of a pair), the dielectric height under the trace and, for stripline, above it; for embedded microstrip, the dielectric over the trace.
    3. Choose the finished copper weight and type the laminate’s εr (Dk) at your frequency, from its datasheet or your fabricator.
    4. The closed-form estimate shows at once and the field solver refines it a moment later. Read the impedance (or the width or gap), the delay and the width table, then copy the result or download it as CSV — with a pass, or after unlocking this result. Confirm the final width with your fabricator, who adjusts it for their process.

    Examples

    50 Ω on a two-layer board
    Input
    Microstrip, 1.6 mm FR-4, εr 4.3, 1 oz copper, solve for width
    Result
    W = 3.07 mm; εeff 3.24, 6.01 ps/mm
    An outer layer over 0.2 mm prepreg
    Input
    Microstrip, W 0.36 mm, H 0.2 mm, 1 oz, εr 4.3
    Result
    Z0 = 49.94 Ω (closed form 49.92 Ω; the IPC-2141 formula gives 47.66 Ω)
    The same trace under 0.1 mm of dielectric
    Input
    Embedded microstrip, C 0.1 mm
    Result
    Z0 = 45.44 Ω: covering the trace lowers the impedance
    A 50 Ω inner layer
    Input
    Centred stripline, H1 = H2 = 0.2 mm, 18 µm copper, εr 4.0
    Result
    W = 0.174 mm; 6.67 ps/mm
    A trace near one plane
    Input
    Offset stripline, W 0.15 mm, H1 0.1 mm, H2 0.4 mm, 18 µm, εr 4.0
    Result
    Z0 = 46.09 Ω, where the image-method formula gives 48.13 Ω
    A 100 Ω pair on 0.1 mm
    Input
    Differential microstrip, S 0.127 mm, H 0.1 mm, 1 oz, εr 4.2
    Result
    W = 0.122 mm (4.8 mil): Z_odd 50 Ω, Z_even 67.6 Ω
    A 90 Ω inner-layer pair
    Input
    Differential stripline, H1 = H2 = 0.15 mm, S 0.127 mm, 18 µm, εr 3.8
    Result
    W = 0.123 mm

    The field solver

    Laplace’s equation ∇·(ε∇φ) = 0 is solved over the cross-section in finite-volume form, with the trace at 1 V and the planes at 0 V, on a grid that is fine at the copper’s edges and coarse far from it; the open space above a microstrip is closed by a grounded box 100 H away, and only half of the symmetric section is solved. The capacitance per length comes from the energy of the field, once with the dielectric (C) and once with air everywhere (C_air), and Z0 = 1 ÷ (c·√(C·C_air)), εeff = C ÷ C_air. A pair is solved in its odd mode (the symmetry plane at 0 V) and its even mode (the plane a mirror).

    Every value is solved on two grids and extrapolated to remove the discretisation error. Against Cohn’s exact solutions for a thin stripline and a thin edge-coupled stripline it agrees within 0.05 %, and with Hammerstad and Jensen’s microstrip within their stated accuracy. For a width or gap, the closed-form answer is corrected until the field solver gives your target.

    The closed-form models beside it

    • Microstrip: Hammerstad and Jensen’s equations, with their correction for copper thickness; for a thin strip the authors give the effective permittivity as accurate to 0.2 % for εr < 128 and W/H from 0.01 to 100 (equations).
    • Embedded microstrip: the dielectric over the trace pulls the effective permittivity towards εr: εeff′ = εr − (εr − εeff)·e^(−2C/H), and Z0′ = Z0·√(εeff ÷ εeff′), exact with no cover and with an infinitely thick one.
    • Stripline: Wheeler’s formula with copper thickness, within 0.5 % of Cohn’s exact solution for a thin strip; an offset trace as two virtual centred striplines in parallel (the image method in Wadell’s Transmission Line Design Handbook): 1/Z0 = ½·[1/Z(2·H1 + T) + 1/Z(2·H2 + T)].
    • Differential microstrip: Kirschning and Jansen’s even- and odd-mode equations (equations), validated for 0.1 ≤ W/H ≤ 10, 0.1 ≤ S/H ≤ 10 and εr ≤ 18, with Jansen’s thickness correction.
    • Differential stripline: Cohn’s exact even- and odd-mode solution for thin strips, corrected for copper thickness by his fringing capacitances.

    Differential, odd, even and common mode

    A pair has two natural modes. Driven in opposite directions (odd mode) each trace sees Z_odd, and the differential impedance a receiver terminates is Zdiff = 2·Z_odd. Driven together (even mode) each sees Z_even, and the common-mode impedance is Z_even ÷ 2. The closer the traces, the lower Z_odd and the higher Z_even; far apart, both approach the impedance of one trace alone and Zdiff becomes twice it. The coupling coefficient (Z_even − Z_odd) ÷ (Z_even + Z_odd) shows how tightly they are coupled.

    Delay, capacitance and inductance

    A trace’s propagation delay is √εeff ÷ c: about 5.9 ps/mm (150 ps/in) for a microstrip on FR-4 and 6.7 ps/mm (170 ps/in) for a stripline in εr 4. From Z0 and the delay follow the capacitance C = √εeff ÷ (c·Z0) and the inductance L = Z0·√εeff ÷ c per unit length. For a pair the calculator gives them for the odd mode, the one a differential signal travels in.

    Why calculators disagree

    Simple formulas such as IPC-2141’s microstrip formula, 87 ÷ √(εr + 1.41)·ln(5.98·H ÷ (0.8·W + T)) (TI’s AN-905 gives it in another form), are only meant for a narrow range (0.1 < W/H < 2) and can be a few ohms off even inside it, which is why this calculator shows them only for comparison. Better closed-form models drift too where their assumptions stop holding: for a stripline trace four times nearer one plane than the other, the image method reads 4.4 % high, and for 1 oz copper with a 0.127 mm gap on 0.1 mm of dielectric, the coupled-microstrip equations read 3.7 % high (the examples above). Results also differ with the copper’s trapezoidal etch, with solder mask, with resin-rich areas next to glass weave, and above all with εr: a laminate’s Dk falls with frequency and varies with its resin content. Fabricators adjust the final width with their own process data.

    Limitations

    • Quasi-static and lossless: dispersion at several GHz, conductor and dielectric loss and surface roughness are not included.
    • Traces are rectangular. Real traces are trapezoidal after etching, and outer layers have plating and solder mask on top, which this calculator does not model separately.
    • One dielectric: the cover of an embedded trace is taken to be the same material as the dielectric under it, and a stripline’s two layers to have the same εr; a solder mask or prepreg of another εr is not modelled.
    • Only one trace or one pair is modelled, with nothing else nearby: other traces, plane cut-outs and copper pours near it change the impedance.

    Privacy

    Everything happens in your browser. What you enter or open here is not uploaded or stored by MySmartCoPilot.

    Frequently asked questions

    What do I get without a pass?

    Without a pass, PCB Trace Impedance Calculator shows the first rows of the width table (up to 3), with the impedance, width or gap you solve for, the working and every other figure hidden. Until you unlock it, the result can’t be downloaded or copied. A Pro, Premium or Ultimate pass, a one-time payment that never renews, unlocks the full result. The pricing page lists the passes and their prices.

    How wide should a 50 Ω trace be?

    It depends on the dielectric height and εr. On a 1.6 mm FR-4 board (εr 4.3) a 50 Ω microstrip is about 3.07 mm wide; over 0.2 mm prepreg it is about 0.36 mm; a centred stripline between planes 0.42 mm apart in εr 4.0 is about 0.17 mm. Choose Solve for: Trace width and type your stack-up.

    What is the difference between microstrip and stripline?

    A microstrip runs on an outer layer over one reference plane, with air above it; part of its field is in air, so its effective permittivity is lower than εr and it is faster. A stripline runs between two planes inside the board, fully in the dielectric: its εeff equals εr, it is slower, and it is better shielded.

    Is differential impedance twice the single-ended impedance?

    Only when the traces are far apart. Zdiff = 2·Z_odd, and coupling makes Z_odd lower than the impedance of one trace alone. Two 0.122 mm traces of 1 oz copper, 0.127 mm apart on 0.1 mm of εr 4.2 dielectric, are 59 Ω each on their own but make a 100 Ω pair, not 119 Ω.

    Why does my fabricator’s width differ from the calculator’s?

    They solve the field too, but with their real copper thickness, trapezoidal etch, plating, solder mask and the Dk of the exact laminate and glass style at your frequency, and they adjust for their process. Use this calculator to plan the stack-up and widths, then let the fabricator confirm them.

    How accurate is the field solver?

    For the cross-section as drawn (rectangular copper, one dielectric, ideal planes, quasi-static), it agrees with Cohn’s exact solutions for a thin stripline and a thin coupled stripline within 0.05 %. The real board differs from the drawing by more than that: etch shape, plating, solder mask and the laminate’s Dk at your frequency can move the impedance by a few per cent.

    Does solder mask change the impedance?

    Yes, a little: covering a microstrip puts dielectric where there was air, which raises its effective permittivity and lowers its impedance. How much depends on the mask’s thickness and εr, so ask your fabricator to include it in their calculation.

    Quick answers and tool search

    Type to search tools or to get a quick answer, for example 18% of 2500. Use the up and down arrow keys to move through the results, Enter to choose, and Escape to close.