This page needs a newer browser to run its tools. You can still read everything here.

Assembly (x86-64, AArch64, RISC-V) Module 14

Performance and microarchitecture interview questions

Interview questions on performance and microarchitecture: warm-ups, then what each harder question tests and how a good answer starts.

11 questions: 3 warm-ups and 8 with model answers · Levels: Fresher to staff

Warm-up questions

Short questions with short answers, each answered in full.

Fresher to mid

A loop sums an array into one double and a profiler calls it latency-bound. What does that mean, and what is the first thing you try?

Answered in the lesson Pipelines, latency and dependency chains
Fresher to mid

A loop that filters an array is slow, and a colleague blames the cache. How would you check whether it is really branch misprediction?

Answered in the lesson Branch prediction and speculative execution
Mid to senior

You time a function with rdtsc, divide the ticks by the clock speed you looked up, and report cycles. What is wrong with that?

Answered in the lesson Measuring cycles: counters, perf and llvm-mca

Questions with model answers

What each question tests, the first step of a good answer and the follow-ups to expect.

Mid to senior

A teammate wants proof that your rewrite of a hot dot-product loop is faster, in a way that comes out the same on every build machine and for everyone who reruns it. How would you give repeatable evidence, and what are its limits?
What it tests

Using a deterministic model such as llvm-mca for a repeatable figure, knowing it estimates the core's scheduler only, and still measuring on real data for the number that ships.

First step

Cut the inner loop out of the release listing, run it through llvm-mca for the target core, and compare the total cycles and block throughput of the old and new loops; check the instruction table for the operation's latency.
Follow-ups
- Why is llvm-mca repeatable across build machines when a timed benchmark is not?
- What does llvm-mca leave out that could make the real loop much slower?
- How do you turn the model number into a claim you can defend about real speed?
- Would you gate the build on a model figure, and how?
From the lesson Pipelines, latency and dependency chains
Model answer, Pro. Model answers open with any pass; prices are in the notice on this page.
Opening the model answers with your pass…
Model answers open with any MySmartCoPilot pass.
Pro pass · 1 week₹79$2.99
30 days₹179$5.99
1 year₹1,699$45
One payment; a pass never renews. The price shown is the total you pay: no fees or charges are added at checkout.
Passes can’t be bought right now, so the model answers can’t be opened at the moment. If you have a pass, enter your licence key.
Choose a pass I have a licence key
It also opens every other in-depth part in Learn and every Pro tool. Sales are final, except where the law gives you a right to withdraw, for example in the EU and the UK (refund policy).
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 3 minutes
Mid to staff

A junior engineer reads "the add unit has latency 4 and throughput 2 per cycle" and concludes a summing loop can do at best one add every 4 cycles. Explain what they got right and wrong, and how you would show it.
What it tests

Separating latency from throughput, knowing a single chain pays the latency while independent work approaches the throughput, and demonstrating both with the same instruction.

First step

Agree that a single dependency chain is bound by the latency, then point out that independent additions overlap, so a loop with several accumulators runs near the throughput, and offer to measure both.
Follow-ups
- What is the most speed-up independent accumulators can give, from those two numbers?
- How would you write a measurement that shows the latency and then the throughput of the same add?
- Why does the gain stop after a certain number of accumulators?
- When is a loop bound by neither latency nor throughput, but by memory?
From the lesson Pipelines, latency and dependency chains
Model answer, Pro.
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 3 minutes
Mid to senior

A service's request filter runs at very different speeds on two production data sets of the same size. Profiling shows the hot function is identical. How do you find out why, and confirm it is branch misprediction?
What it tests

Reasoning that speed can depend on data through branch prediction, designing an experiment that isolates it (reorder or sort, go branchless), and reading a branch-miss counter to confirm.

First step

Check whether the hot loop has a data-dependent branch, then run both data sets through it with the branch made predictable (sort or group) and again with a branchless version, comparing the times and the branch-miss counts.
Follow-ups
- Why would two same-size inputs differ in speed on identical code?
- What counter would you read, and what value confirms misprediction?
- How do you rule out the cache and alignment as the cause?
- What fix would you ship, and how do you keep it from regressing?
From the lesson Branch prediction and speculative execution
Model answer, Pro.
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 2 minutes
Mid to senior

A teammate wants to make every branch in a hot loop branchless after reading that branches are slow. When do you agree, and when do you push back, with the reasoning you would give?
What it tests

Weighing, branch by branch, what a branchless rewrite costs against what it saves, and settling the choice by measuring both forms on real data rather than by a rule.

First step

List the branches in the hot loop and, for each, measure how often it goes each way on real input and note what work sits on each side of it. Then time the branchy and branchless forms of each candidate on that input before changing anything.
Follow-ups
- Why can a branchless rewrite be slower than the branch it replaced?
- Which branches are the best candidates to make branchless?
- How does the compiler already help here at -O2?
- What do you measure to decide, and on what data?
From the lesson Branch prediction and speculative execution
Model answer, Pro.
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 2 minutes
Senior to staff

A security audit of code that indexes a buffer after a bounds check asks whether it is exposed to a speculative side channel and, if so, how to defend it without rewriting everything. How do you answer?
What it tests

Explaining the bounds-check-bypass mechanism defensively, finding the checks where it matters, and choosing a proportionate defence at each rather than a change across the whole program.

First step

Start from the mechanism: list the bounds checks that guard an index untrusted input can set, and for each ask what a load past the check could reach if the check were predicted the wrong way. Those are the places to defend.
Follow-ups
- Why does discarding the speculative result not remove the leak?
- Where exactly do you put a speculation barrier, and why there?
- When would you prefer index masking or compiler hardening?
- How do you decide which boundaries need this and which do not?
From the lesson Branch prediction and speculative execution
Model answer, Pro.
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 3 minutes
Mid to senior

A loop's wall-clock time (from a fixed-frequency counter) looks fine, but it is slower than you expected from the instruction count. What does a profiler add that the time counter cannot, and how would you use it?
What it tests

Knowing a time counter gives only elapsed time, while perf reads event counters (cycles, cache misses, branch misses), and using those events to find the cause.

First step

Run the loop under perf stat to read cycles, instructions, cache-misses and branch-misses, and compare the event counts with the wall-clock time to see whether misses or mispredictions explain the gap.
Follow-ups
- What can a fixed-frequency time counter never tell you on its own?
- Which perf events would separate a cache problem from a branch problem?
- How does instructions-per-cycle help here?
- When would sampling with perf record mislead you?
From the lesson Measuring cycles: counters, perf and llvm-mca
Model answer, Pro.
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 2 minutes
Mid to staff

llvm-mca says your rewritten loop is 2x faster, and you want to put that figure in a pull request. When is it safe to trust, when must you measure instead, and how would you present it?
What it tests

Knowing llvm-mca models the core scheduler and assumes cache hits, so it is reliable for compute-bound loops and misleading for memory-bound ones, and presenting a model figure as what it is.

First step

Decide whether the loop is compute-bound or memory-bound: if its working set fits in cache and it is arithmetic, the model is a fair guide; if it streams a large array, measure, because the model assumes cache hits.
Follow-ups
- What exactly does llvm-mca leave out of its estimate?
- For which loops is the model estimate close to reality?
- How would you word the claim in the pull request?
- Would you ever gate CI on an llvm-mca number?
From the lesson Measuring cycles: counters, perf and llvm-mca
Model answer, Pro.
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 2 minutes
Senior to staff

You need core-cycle counts for a micro-optimisation, portably across x86-64, AArch64 and RISC-V, from a normal user program. What are your options and their trade-offs, and what would you actually do?
What it tests

Knowing cycle counters are kernel-gated on most systems, that time counters are not cycles, and that the portable answer is a profiling interface or enabling user access deliberately, not raw instructions.

First step

Separate what each ISA lets user code read: user code may read the time counters, but they are not cycles; the cycle counters (PMCCNTR_EL0, rdcycle, the x86 PMU) usually need the kernel, so reach for perf or the perf_event interface.
Follow-ups
- Why is a raw rdcycle or PMCCNTR_EL0 read unreliable from user mode by default?
- What does the kernel setting that enables user access cost you in safety?
- How does perf give you cycles portably without raw instructions?
- When is elapsed time the better measure after all?
From the lesson Measuring cycles: counters, perf and llvm-mca
Model answer, Pro.
In the answer:
- Model answer
- Common mistakes
- Rubric
- Variants
- about 2 minutes

All Assembly (x86-64, AArch64, RISC-V) interview questions · The Assembly (x86-64, AArch64, RISC-V) track

Warm-up questions

A loop sums an array into one double and a profiler calls it latency-bound. What does that mean, and what is the first thing you try?

A loop that filters an array is slow, and a colleague blames the cache. How would you check whether it is really branch misprediction?

You time a function with rdtsc, divide the ticks by the clock speed you looked up, and report cycles. What is wrong with that?

Questions with model answers

A teammate wants proof that your rewrite of a hot dot-product loop is faster, in a way that comes out the same on every build machine and for everyone who reruns it. How would you give repeatable evidence, and what are its limits?

A junior engineer reads "the add unit has latency 4 and throughput 2 per cycle" and concludes a summing loop can do at best one add every 4 cycles. Explain what they got right and wrong, and how you would show it.

A service's request filter runs at very different speeds on two production data sets of the same size. Profiling shows the hot function is identical. How do you find out why, and confirm it is branch misprediction?

A teammate wants to make every branch in a hot loop branchless after reading that branches are slow. When do you agree, and when do you push back, with the reasoning you would give?

A security audit of code that indexes a buffer after a bounds check asks whether it is exposed to a speculative side channel and, if so, how to defend it without rewriting everything. How do you answer?

A loop's wall-clock time (from a fixed-frequency counter) looks fine, but it is slower than you expected from the instruction count. What does a profiler add that the time counter cannot, and how would you use it?

llvm-mca says your rewritten loop is 2x faster, and you want to put that figure in a pull request. When is it safe to trust, when must you measure instead, and how would you present it?

You need core-cycle counts for a micro-optimisation, portably across x86-64, AArch64 and RISC-V, from a normal user program. What are your options and their trade-offs, and what would you actually do?